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PARITY CHECKERS

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أستاذ المادة احمد محمد شهاب المطيري       3/22/2011 1:37:11 PM

Exp (4)

 

 

PARITY CHECKERS

 

 

AIM:- to understand the operation of parity checkers

 

 

Theory:- errors can occur as digital codes being transferred from one point to another within a digital system . many systems ,however , employ a parity bit as a means of detecting a bit error .binary information is in group of bits called words . A word always contains either an even or odd number of 1 s . A parity bit is attached to the group of information bits in order to make the total number of 1 s always even or always odd . an even parity bit makes the total number of 1 s even and an odd parity bit makes the total odd.

 

 

        A given system operates with even or odd parity , but not both , for instance if a system operates with even parity , a check is made on each group of bits received to make sure that the total number of 1 s in that group is even . if there is an odd number of 1 s , an error has occurred

 

 

 

        The parity bit can be attached to the code group at either the beginning or the end , depending on system design , notice that the total number of 1 s , including the parity bit is always even for even parity and always odd for odd parity .

 

 

A truth table of even parity and odd parity is shown below :

 

 

 

A

 

B

 

C

 

Even parity Pe

 

Odd parity Po

 

0

 

0

 

0

 

0

 

1

 

0

 

0

 

1

 

1

 

0

 

0

 

1

 

0

 

1

 

0

 

0

 

1

 

1

 

0

 

1

 

1

 

0

 

0

 

1

 

0

 

1

 

0

 

1

 

0

 

1

 

1

 

1

 

0

 

0

 

1

 

1

 

1

 

1

 

1

 

0

 

  

 

From the truth table :-

 

 

Pe = AB`C`+ A`BC` + A`B`C + ABC                     

 

     = C`[AB`+A`B] + C[AB + A`B`]                                   let Z= AB`+A`B   

 

     = C`Z+CZ`                                                                           Z`= AB+A`B`

 

 Pe = C ± Z ……….1

 

 

Po = A`B`C` + ABC`+ AB`C + A`BC

 

     = C` [A`B`+ AB ] + C [ AB`+A`B]

 

     = C`Z`+ CZ

 

 

 


Po = C ± Z  ………….2

 

 

From eq(1) , (2) we can draw the logic diagram  As in fig.(1) , fig (2)

 

 

 

     

B

 

A

 

      

Pe

 

                                    C

 

 

Z

 

 

 

 

 

 

 

 

 


                                     Fig(1) a

 

 

                    

A

 

               

C

  

Z

 

  

B

 

 

Pe

 

 

 

 

 

 

 

 

 

 

 

 

 

 


                                  Fig(1) b

 

 

 

 

Po

 

C

 

 

     

B

 

A

 

     

Z

 


                                                                                      l

 

 

 

 

                                                                                    

 

 

 

 

                             Fig(2) a

 

 

 

 

                    

A

 

             

C

  

Z

 

B

 

      

Fig(2) b

 

 

Po

 

 

 

 

 

 


PROCEDURE

 

 

 

1-      connect the circuit as shown in fig(1) b

 

2-      state the truth table.

 

3-      Connect the circuit as shown in fig(2) b

 

4-      State the truth table

 

5-      Design an even parity and an odd parity for four input data.

 

6-      Simplify the circuit and connect it

 

7-      State the truth table of the circuit.

 

 

 

 

DISCUSSION

 

 

 

1-Assign the proper even parity bit to the following code words

 

 

1010,111000,100011100101and 1011010111111

 

 

 2- An odd parity system receives the following code words

 

 

Ahmed M.Shhaab

 

 110011,11011110100,1100010101010 determine which ones , if any ,are in error.

 


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